update crypto vendors (#10385)
techknowlogick
4 years ago
committed by
GitHub
parent
3c45cf8494
commit
63a6e71ac2
@ -1,19 +0,0 @@
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// Copyright 2015 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// +build arm,!gccgo,!appengine,!nacl
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package poly1305
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// poly1305_auth_armv6 is implemented in sum_arm.s
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//go:noescape
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func poly1305_auth_armv6(out *[16]byte, m *byte, mlen uint32, key *[32]byte)
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func sum(out *[16]byte, m []byte, key *[32]byte) {
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var mPtr *byte
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if len(m) > 0 {
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mPtr = &m[0]
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}
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poly1305_auth_armv6(out, mPtr, uint32(len(m)), key)
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}
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@ -1,427 +0,0 @@
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// Copyright 2015 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// +build arm,!gccgo,!appengine,!nacl
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#include "textflag.h"
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// This code was translated into a form compatible with 5a from the public
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// domain source by Andrew Moon: github.com/floodyberry/poly1305-opt/blob/master/app/extensions/poly1305.
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DATA ·poly1305_init_constants_armv6<>+0x00(SB)/4, $0x3ffffff
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DATA ·poly1305_init_constants_armv6<>+0x04(SB)/4, $0x3ffff03
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DATA ·poly1305_init_constants_armv6<>+0x08(SB)/4, $0x3ffc0ff
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DATA ·poly1305_init_constants_armv6<>+0x0c(SB)/4, $0x3f03fff
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DATA ·poly1305_init_constants_armv6<>+0x10(SB)/4, $0x00fffff
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GLOBL ·poly1305_init_constants_armv6<>(SB), 8, $20
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// Warning: the linker may use R11 to synthesize certain instructions. Please
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// take care and verify that no synthetic instructions use it.
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TEXT poly1305_init_ext_armv6<>(SB), NOSPLIT, $0
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// Needs 16 bytes of stack and 64 bytes of space pointed to by R0. (It
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// might look like it's only 60 bytes of space but the final four bytes
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// will be written by another function.) We need to skip over four
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// bytes of stack because that's saving the value of 'g'.
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ADD $4, R13, R8
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MOVM.IB [R4-R7], (R8)
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MOVM.IA.W (R1), [R2-R5]
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MOVW $·poly1305_init_constants_armv6<>(SB), R7
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MOVW R2, R8
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MOVW R2>>26, R9
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MOVW R3>>20, g
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MOVW R4>>14, R11
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MOVW R5>>8, R12
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ORR R3<<6, R9, R9
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ORR R4<<12, g, g
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ORR R5<<18, R11, R11
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MOVM.IA (R7), [R2-R6]
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AND R8, R2, R2
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AND R9, R3, R3
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AND g, R4, R4
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AND R11, R5, R5
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AND R12, R6, R6
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MOVM.IA.W [R2-R6], (R0)
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EOR R2, R2, R2
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EOR R3, R3, R3
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EOR R4, R4, R4
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EOR R5, R5, R5
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EOR R6, R6, R6
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MOVM.IA.W [R2-R6], (R0)
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MOVM.IA.W (R1), [R2-R5]
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MOVM.IA [R2-R6], (R0)
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ADD $20, R13, R0
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MOVM.DA (R0), [R4-R7]
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RET
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#define MOVW_UNALIGNED(Rsrc, Rdst, Rtmp, offset) \
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MOVBU (offset+0)(Rsrc), Rtmp; \
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MOVBU Rtmp, (offset+0)(Rdst); \
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MOVBU (offset+1)(Rsrc), Rtmp; \
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MOVBU Rtmp, (offset+1)(Rdst); \
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MOVBU (offset+2)(Rsrc), Rtmp; \
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MOVBU Rtmp, (offset+2)(Rdst); \
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MOVBU (offset+3)(Rsrc), Rtmp; \
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MOVBU Rtmp, (offset+3)(Rdst)
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TEXT poly1305_blocks_armv6<>(SB), NOSPLIT, $0
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// Needs 24 bytes of stack for saved registers and then 88 bytes of
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// scratch space after that. We assume that 24 bytes at (R13) have
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// already been used: four bytes for the link register saved in the
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// prelude of poly1305_auth_armv6, four bytes for saving the value of g
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// in that function and 16 bytes of scratch space used around
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// poly1305_finish_ext_armv6_skip1.
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ADD $24, R13, R12
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MOVM.IB [R4-R8, R14], (R12)
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MOVW R0, 88(R13)
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MOVW R1, 92(R13)
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MOVW R2, 96(R13)
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MOVW R1, R14
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MOVW R2, R12
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MOVW 56(R0), R8
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WORD $0xe1180008 // TST R8, R8 not working see issue 5921
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EOR R6, R6, R6
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MOVW.EQ $(1<<24), R6
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MOVW R6, 84(R13)
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ADD $116, R13, g
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MOVM.IA (R0), [R0-R9]
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MOVM.IA [R0-R4], (g)
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CMP $16, R12
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BLO poly1305_blocks_armv6_done
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poly1305_blocks_armv6_mainloop:
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WORD $0xe31e0003 // TST R14, #3 not working see issue 5921
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BEQ poly1305_blocks_armv6_mainloop_aligned
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ADD $100, R13, g
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MOVW_UNALIGNED(R14, g, R0, 0)
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MOVW_UNALIGNED(R14, g, R0, 4)
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MOVW_UNALIGNED(R14, g, R0, 8)
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MOVW_UNALIGNED(R14, g, R0, 12)
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MOVM.IA (g), [R0-R3]
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ADD $16, R14
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B poly1305_blocks_armv6_mainloop_loaded
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poly1305_blocks_armv6_mainloop_aligned:
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MOVM.IA.W (R14), [R0-R3]
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poly1305_blocks_armv6_mainloop_loaded:
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MOVW R0>>26, g
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MOVW R1>>20, R11
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MOVW R2>>14, R12
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MOVW R14, 92(R13)
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MOVW R3>>8, R4
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ORR R1<<6, g, g
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ORR R2<<12, R11, R11
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ORR R3<<18, R12, R12
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BIC $0xfc000000, R0, R0
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BIC $0xfc000000, g, g
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MOVW 84(R13), R3
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BIC $0xfc000000, R11, R11
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BIC $0xfc000000, R12, R12
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ADD R0, R5, R5
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ADD g, R6, R6
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ORR R3, R4, R4
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ADD R11, R7, R7
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ADD $116, R13, R14
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ADD R12, R8, R8
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ADD R4, R9, R9
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MOVM.IA (R14), [R0-R4]
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MULLU R4, R5, (R11, g)
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MULLU R3, R5, (R14, R12)
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MULALU R3, R6, (R11, g)
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MULALU R2, R6, (R14, R12)
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MULALU R2, R7, (R11, g)
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MULALU R1, R7, (R14, R12)
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ADD R4<<2, R4, R4
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ADD R3<<2, R3, R3
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MULALU R1, R8, (R11, g)
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MULALU R0, R8, (R14, R12)
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MULALU R0, R9, (R11, g)
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MULALU R4, R9, (R14, R12)
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MOVW g, 76(R13)
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MOVW R11, 80(R13)
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MOVW R12, 68(R13)
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MOVW R14, 72(R13)
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MULLU R2, R5, (R11, g)
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MULLU R1, R5, (R14, R12)
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MULALU R1, R6, (R11, g)
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MULALU R0, R6, (R14, R12)
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MULALU R0, R7, (R11, g)
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MULALU R4, R7, (R14, R12)
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ADD R2<<2, R2, R2
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ADD R1<<2, R1, R1
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MULALU R4, R8, (R11, g)
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MULALU R3, R8, (R14, R12)
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MULALU R3, R9, (R11, g)
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MULALU R2, R9, (R14, R12)
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MOVW g, 60(R13)
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MOVW R11, 64(R13)
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MOVW R12, 52(R13)
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MOVW R14, 56(R13)
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MULLU R0, R5, (R11, g)
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MULALU R4, R6, (R11, g)
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MULALU R3, R7, (R11, g)
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MULALU R2, R8, (R11, g)
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MULALU R1, R9, (R11, g)
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ADD $52, R13, R0
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MOVM.IA (R0), [R0-R7]
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MOVW g>>26, R12
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MOVW R4>>26, R14
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ORR R11<<6, R12, R12
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ORR R5<<6, R14, R14
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BIC $0xfc000000, g, g
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BIC $0xfc000000, R4, R4
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ADD.S R12, R0, R0
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ADC $0, R1, R1
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ADD.S R14, R6, R6
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ADC $0, R7, R7
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MOVW R0>>26, R12
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MOVW R6>>26, R14
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ORR R1<<6, R12, R12
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ORR R7<<6, R14, R14
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BIC $0xfc000000, R0, R0
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BIC $0xfc000000, R6, R6
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ADD R14<<2, R14, R14
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ADD.S R12, R2, R2
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ADC $0, R3, R3
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ADD R14, g, g
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MOVW R2>>26, R12
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MOVW g>>26, R14
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ORR R3<<6, R12, R12
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BIC $0xfc000000, g, R5
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BIC $0xfc000000, R2, R7
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ADD R12, R4, R4
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ADD R14, R0, R0
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MOVW R4>>26, R12
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BIC $0xfc000000, R4, R8
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ADD R12, R6, R9
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MOVW 96(R13), R12
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MOVW 92(R13), R14
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MOVW R0, R6
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CMP $32, R12
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SUB $16, R12, R12
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MOVW R12, 96(R13)
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BHS poly1305_blocks_armv6_mainloop
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poly1305_blocks_armv6_done:
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MOVW 88(R13), R12
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MOVW R5, 20(R12)
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MOVW R6, 24(R12)
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MOVW R7, 28(R12)
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MOVW R8, 32(R12)
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MOVW R9, 36(R12)
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ADD $48, R13, R0
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MOVM.DA (R0), [R4-R8, R14]
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RET
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#define MOVHUP_UNALIGNED(Rsrc, Rdst, Rtmp) \
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MOVBU.P 1(Rsrc), Rtmp; \
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MOVBU.P Rtmp, 1(Rdst); \
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MOVBU.P 1(Rsrc), Rtmp; \
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MOVBU.P Rtmp, 1(Rdst)
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#define MOVWP_UNALIGNED(Rsrc, Rdst, Rtmp) \
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MOVHUP_UNALIGNED(Rsrc, Rdst, Rtmp); \
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MOVHUP_UNALIGNED(Rsrc, Rdst, Rtmp)
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// func poly1305_auth_armv6(out *[16]byte, m *byte, mlen uint32, key *[32]key)
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TEXT ·poly1305_auth_armv6(SB), $196-16
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// The value 196, just above, is the sum of 64 (the size of the context
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// structure) and 132 (the amount of stack needed).
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//
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// At this point, the stack pointer (R13) has been moved down. It
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// points to the saved link register and there's 196 bytes of free
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// space above it.
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//
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// The stack for this function looks like:
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//
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// +---------------------
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// |
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// | 64 bytes of context structure
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// |
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// +---------------------
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// |
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// | 112 bytes for poly1305_blocks_armv6
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// |
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// +---------------------
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// | 16 bytes of final block, constructed at
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// | poly1305_finish_ext_armv6_skip8
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// +---------------------
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// | four bytes of saved 'g'
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// +---------------------
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// | lr, saved by prelude <- R13 points here
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// +---------------------
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MOVW g, 4(R13)
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MOVW out+0(FP), R4
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MOVW m+4(FP), R5
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MOVW mlen+8(FP), R6
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MOVW key+12(FP), R7
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ADD $136, R13, R0 // 136 = 4 + 4 + 16 + 112
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MOVW R7, R1
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// poly1305_init_ext_armv6 will write to the stack from R13+4, but
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// that's ok because none of the other values have been written yet.
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BL poly1305_init_ext_armv6<>(SB)
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BIC.S $15, R6, R2
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BEQ poly1305_auth_armv6_noblocks
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ADD $136, R13, R0
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MOVW R5, R1
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ADD R2, R5, R5
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SUB R2, R6, R6
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BL poly1305_blocks_armv6<>(SB)
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poly1305_auth_armv6_noblocks:
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ADD $136, R13, R0
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MOVW R5, R1
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MOVW R6, R2
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MOVW R4, R3
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MOVW R0, R5
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MOVW R1, R6
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MOVW R2, R7
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MOVW R3, R8
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AND.S R2, R2, R2
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BEQ poly1305_finish_ext_armv6_noremaining
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EOR R0, R0
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ADD $8, R13, R9 // 8 = offset to 16 byte scratch space
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MOVW R0, (R9)
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MOVW R0, 4(R9)
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MOVW R0, 8(R9)
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MOVW R0, 12(R9)
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WORD $0xe3110003 // TST R1, #3 not working see issue 5921
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BEQ poly1305_finish_ext_armv6_aligned
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WORD $0xe3120008 // TST R2, #8 not working see issue 5921
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BEQ poly1305_finish_ext_armv6_skip8
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MOVWP_UNALIGNED(R1, R9, g)
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MOVWP_UNALIGNED(R1, R9, g)
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poly1305_finish_ext_armv6_skip8:
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WORD $0xe3120004 // TST $4, R2 not working see issue 5921
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BEQ poly1305_finish_ext_armv6_skip4
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MOVWP_UNALIGNED(R1, R9, g)
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poly1305_finish_ext_armv6_skip4:
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WORD $0xe3120002 // TST $2, R2 not working see issue 5921
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BEQ poly1305_finish_ext_armv6_skip2
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MOVHUP_UNALIGNED(R1, R9, g)
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B poly1305_finish_ext_armv6_skip2
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poly1305_finish_ext_armv6_aligned:
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WORD $0xe3120008 // TST R2, #8 not working see issue 5921
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BEQ poly1305_finish_ext_armv6_skip8_aligned
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MOVM.IA.W (R1), [g-R11]
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MOVM.IA.W [g-R11], (R9)
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poly1305_finish_ext_armv6_skip8_aligned:
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WORD $0xe3120004 // TST $4, R2 not working see issue 5921
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BEQ poly1305_finish_ext_armv6_skip4_aligned
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MOVW.P 4(R1), g
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MOVW.P g, 4(R9)
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poly1305_finish_ext_armv6_skip4_aligned:
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WORD $0xe3120002 // TST $2, R2 not working see issue 5921
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BEQ poly1305_finish_ext_armv6_skip2
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MOVHU.P 2(R1), g
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MOVH.P g, 2(R9)
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poly1305_finish_ext_armv6_skip2:
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WORD $0xe3120001 // TST $1, R2 not working see issue 5921
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BEQ poly1305_finish_ext_armv6_skip1
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MOVBU.P 1(R1), g
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MOVBU.P g, 1(R9)
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poly1305_finish_ext_armv6_skip1:
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MOVW $1, R11
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MOVBU R11, 0(R9)
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MOVW R11, 56(R5)
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MOVW R5, R0
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ADD $8, R13, R1
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MOVW $16, R2
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BL poly1305_blocks_armv6<>(SB)
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poly1305_finish_ext_armv6_noremaining:
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MOVW 20(R5), R0
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MOVW 24(R5), R1
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MOVW 28(R5), R2
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MOVW 32(R5), R3
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MOVW 36(R5), R4
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MOVW R4>>26, R12
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BIC $0xfc000000, R4, R4
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ADD R12<<2, R12, R12
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ADD R12, R0, R0
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MOVW R0>>26, R12
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BIC $0xfc000000, R0, R0
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ADD R12, R1, R1
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MOVW R1>>26, R12
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BIC $0xfc000000, R1, R1
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ADD R12, R2, R2
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MOVW R2>>26, R12
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BIC $0xfc000000, R2, R2
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ADD R12, R3, R3
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MOVW R3>>26, R12
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BIC $0xfc000000, R3, R3
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ADD R12, R4, R4
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ADD $5, R0, R6
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MOVW R6>>26, R12
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BIC $0xfc000000, R6, R6
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ADD R12, R1, R7
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MOVW R7>>26, R12
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BIC $0xfc000000, R7, R7
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ADD R12, R2, g
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MOVW g>>26, R12
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BIC $0xfc000000, g, g
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ADD R12, R3, R11
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MOVW $-(1<<26), R12
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ADD R11>>26, R12, R12
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BIC $0xfc000000, R11, R11
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ADD R12, R4, R9
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MOVW R9>>31, R12
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SUB $1, R12
|
||||
AND R12, R6, R6
|
||||
AND R12, R7, R7
|
||||
AND R12, g, g
|
||||
AND R12, R11, R11
|
||||
AND R12, R9, R9
|
||||
MVN R12, R12
|
||||
AND R12, R0, R0
|
||||
AND R12, R1, R1
|
||||
AND R12, R2, R2
|
||||
AND R12, R3, R3
|
||||
AND R12, R4, R4
|
||||
ORR R6, R0, R0
|
||||
ORR R7, R1, R1
|
||||
ORR g, R2, R2
|
||||
ORR R11, R3, R3
|
||||
ORR R9, R4, R4
|
||||
ORR R1<<26, R0, R0
|
||||
MOVW R1>>6, R1
|
||||
ORR R2<<20, R1, R1
|
||||
MOVW R2>>12, R2
|
||||
ORR R3<<14, R2, R2
|
||||
MOVW R3>>18, R3
|
||||
ORR R4<<8, R3, R3
|
||||
MOVW 40(R5), R6
|
||||
MOVW 44(R5), R7
|
||||
MOVW 48(R5), g
|
||||
MOVW 52(R5), R11
|
||||
ADD.S R6, R0, R0
|
||||
ADC.S R7, R1, R1
|
||||
ADC.S g, R2, R2
|
||||
ADC.S R11, R3, R3
|
||||
MOVM.IA [R0-R3], (R8)
|
||||
MOVW R5, R12
|
||||
EOR R0, R0, R0
|
||||
EOR R1, R1, R1
|
||||
EOR R2, R2, R2
|
||||
EOR R3, R3, R3
|
||||
EOR R4, R4, R4
|
||||
EOR R5, R5, R5
|
||||
EOR R6, R6, R6
|
||||
EOR R7, R7, R7
|
||||
MOVM.IA.W [R0-R7], (R12)
|
||||
MOVM.IA [R0-R7], (R12)
|
||||
MOVW 4(R13), g
|
||||
RET
|
||||
@ -0,0 +1,93 @@
|
||||
// Copyright 2014 The Go Authors. All rights reserved.
|
||||
// Use of this source code is governed by a BSD-style
|
||||
// license that can be found in the LICENSE file.
|
||||
|
||||
// Package bcrypt_pbkdf implements bcrypt_pbkdf(3) from OpenBSD.
|
||||
//
|
||||
// See https://flak.tedunangst.com/post/bcrypt-pbkdf and
|
||||
// https://cvsweb.openbsd.org/cgi-bin/cvsweb/src/lib/libutil/bcrypt_pbkdf.c.
|
||||
package bcrypt_pbkdf
|
||||
|
||||
import (
|
||||
"crypto/sha512"
|
||||
"errors"
|
||||
"golang.org/x/crypto/blowfish"
|
||||
)
|
||||
|
||||
const blockSize = 32
|
||||
|
||||
// Key derives a key from the password, salt and rounds count, returning a
|
||||
// []byte of length keyLen that can be used as cryptographic key.
|
||||
func Key(password, salt []byte, rounds, keyLen int) ([]byte, error) {
|
||||
if rounds < 1 {
|
||||
return nil, errors.New("bcrypt_pbkdf: number of rounds is too small")
|
||||
}
|
||||
if len(password) == 0 {
|
||||
return nil, errors.New("bcrypt_pbkdf: empty password")
|
||||
}
|
||||
if len(salt) == 0 || len(salt) > 1<<20 {
|
||||
return nil, errors.New("bcrypt_pbkdf: bad salt length")
|
||||
}
|
||||
if keyLen > 1024 {
|
||||
return nil, errors.New("bcrypt_pbkdf: keyLen is too large")
|
||||
}
|
||||
|
||||
numBlocks := (keyLen + blockSize - 1) / blockSize
|
||||
key := make([]byte, numBlocks*blockSize)
|
||||
|
||||
h := sha512.New()
|
||||
h.Write(password)
|
||||
shapass := h.Sum(nil)
|
||||
|
||||
shasalt := make([]byte, 0, sha512.Size)
|
||||
cnt, tmp := make([]byte, 4), make([]byte, blockSize)
|
||||
for block := 1; block <= numBlocks; block++ {
|
||||
h.Reset()
|
||||
h.Write(salt)
|
||||
cnt[0] = byte(block >> 24)
|
||||
cnt[1] = byte(block >> 16)
|
||||
cnt[2] = byte(block >> 8)
|
||||
cnt[3] = byte(block)
|
||||
h.Write(cnt)
|
||||
bcryptHash(tmp, shapass, h.Sum(shasalt))
|
||||
|
||||
out := make([]byte, blockSize)
|
||||
copy(out, tmp)
|
||||
for i := 2; i <= rounds; i++ {
|
||||
h.Reset()
|
||||
h.Write(tmp)
|
||||
bcryptHash(tmp, shapass, h.Sum(shasalt))
|
||||
for j := 0; j < len(out); j++ {
|
||||
out[j] ^= tmp[j]
|
||||
}
|
||||
}
|
||||
|
||||
for i, v := range out {
|
||||
key[i*numBlocks+(block-1)] = v
|
||||
}
|
||||
}
|
||||
return key[:keyLen], nil
|
||||
}
|
||||
|
||||
var magic = []byte("OxychromaticBlowfishSwatDynamite")
|
||||
|
||||
func bcryptHash(out, shapass, shasalt []byte) {
|
||||
c, err := blowfish.NewSaltedCipher(shapass, shasalt)
|
||||
if err != nil {
|
||||
panic(err)
|
||||
}
|
||||
for i := 0; i < 64; i++ {
|
||||
blowfish.ExpandKey(shasalt, c)
|
||||
blowfish.ExpandKey(shapass, c)
|
||||
}
|
||||
copy(out, magic)
|
||||
for i := 0; i < 32; i += 8 {
|
||||
for j := 0; j < 64; j++ {
|
||||
c.Encrypt(out[i:i+8], out[i:i+8])
|
||||
}
|
||||
}
|
||||
// Swap bytes due to different endianness.
|
||||
for i := 0; i < 32; i += 4 {
|
||||
out[i+3], out[i+2], out[i+1], out[i] = out[i], out[i+1], out[i+2], out[i+3]
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,138 @@
|
||||
// Copyright 2019 The Go Authors. All rights reserved.
|
||||
// Use of this source code is governed by a BSD-style
|
||||
// license that can be found in the LICENSE file.
|
||||
|
||||
package cpu
|
||||
|
||||
import "runtime"
|
||||
|
||||
const cacheLineSize = 64
|
||||
|
||||
func init() {
|
||||
switch runtime.GOOS {
|
||||
case "android", "darwin":
|
||||
// Android and iOS don't seem to allow reading these registers.
|
||||
// Fake the minimal features expected by
|
||||
// TestARM64minimalFeatures.
|
||||
ARM64.HasASIMD = true
|
||||
ARM64.HasFP = true
|
||||
case "linux":
|
||||
doinit()
|
||||
default:
|
||||
readARM64Registers()
|
||||
}
|
||||
}
|
||||
|
||||
func readARM64Registers() {
|
||||
Initialized = true
|
||||
|
||||
// ID_AA64ISAR0_EL1
|
||||
isar0 := getisar0()
|
||||
|
||||
switch extractBits(isar0, 4, 7) {
|
||||
case 1:
|
||||
ARM64.HasAES = true
|
||||
case 2:
|
||||
ARM64.HasAES = true
|
||||
ARM64.HasPMULL = true
|
||||
}
|
||||
|
||||
switch extractBits(isar0, 8, 11) {
|
||||
case 1:
|
||||
ARM64.HasSHA1 = true
|
||||
}
|
||||
|
||||
switch extractBits(isar0, 12, 15) {
|
||||
case 1:
|
||||
ARM64.HasSHA2 = true
|
||||
case 2:
|
||||
ARM64.HasSHA2 = true
|
||||
ARM64.HasSHA512 = true
|
||||
}
|
||||
|
||||
switch extractBits(isar0, 16, 19) {
|
||||
case 1:
|
||||
ARM64.HasCRC32 = true
|
||||
}
|
||||
|
||||
switch extractBits(isar0, 20, 23) {
|
||||
case 2:
|
||||
ARM64.HasATOMICS = true
|
||||
}
|
||||
|
||||
switch extractBits(isar0, 28, 31) {
|
||||
case 1:
|
||||
ARM64.HasASIMDRDM = true
|
||||
}
|
||||
|
||||
switch extractBits(isar0, 32, 35) {
|
||||
case 1:
|
||||
ARM64.HasSHA3 = true
|
||||
}
|
||||
|
||||
switch extractBits(isar0, 36, 39) {
|
||||
case 1:
|
||||
ARM64.HasSM3 = true
|
||||
}
|
||||
|
||||
switch extractBits(isar0, 40, 43) {
|
||||
case 1:
|
||||
ARM64.HasSM4 = true
|
||||
}
|
||||
|
||||
switch extractBits(isar0, 44, 47) {
|
||||
case 1:
|
||||
ARM64.HasASIMDDP = true
|
||||
}
|
||||
|
||||
// ID_AA64ISAR1_EL1
|
||||
isar1 := getisar1()
|
||||
|
||||
switch extractBits(isar1, 0, 3) {
|
||||
case 1:
|
||||
ARM64.HasDCPOP = true
|
||||
}
|
||||
|
||||
switch extractBits(isar1, 12, 15) {
|
||||
case 1:
|
||||
ARM64.HasJSCVT = true
|
||||
}
|
||||
|
||||
switch extractBits(isar1, 16, 19) {
|
||||
case 1:
|
||||
ARM64.HasFCMA = true
|
||||
}
|
||||
|
||||
switch extractBits(isar1, 20, 23) {
|
||||
case 1:
|
||||
ARM64.HasLRCPC = true
|
||||
}
|
||||
|
||||
// ID_AA64PFR0_EL1
|
||||
pfr0 := getpfr0()
|
||||
|
||||
switch extractBits(pfr0, 16, 19) {
|
||||
case 0:
|
||||
ARM64.HasFP = true
|
||||
case 1:
|
||||
ARM64.HasFP = true
|
||||
ARM64.HasFPHP = true
|
||||
}
|
||||
|
||||
switch extractBits(pfr0, 20, 23) {
|
||||
case 0:
|
||||
ARM64.HasASIMD = true
|
||||
case 1:
|
||||
ARM64.HasASIMD = true
|
||||
ARM64.HasASIMDHP = true
|
||||
}
|
||||
|
||||
switch extractBits(pfr0, 32, 35) {
|
||||
case 1:
|
||||
ARM64.HasSVE = true
|
||||
}
|
||||
}
|
||||
|
||||
func extractBits(data uint64, start, end uint) uint {
|
||||
return (uint)(data>>start) & ((1 << (end - start + 1)) - 1)
|
||||
}
|
||||
@ -0,0 +1,31 @@
|
||||
// Copyright 2019 The Go Authors. All rights reserved.
|
||||
// Use of this source code is governed by a BSD-style
|
||||
// license that can be found in the LICENSE file.
|
||||
|
||||
// +build !gccgo
|
||||
|
||||
#include "textflag.h"
|
||||
|
||||
// func getisar0() uint64
|
||||
TEXT ·getisar0(SB),NOSPLIT,$0-8
|
||||
// get Instruction Set Attributes 0 into x0
|
||||
// mrs x0, ID_AA64ISAR0_EL1 = d5380600
|
||||
WORD $0xd5380600
|
||||
MOVD R0, ret+0(FP)
|
||||
RET
|
||||
|
||||
// func getisar1() uint64
|
||||
TEXT ·getisar1(SB),NOSPLIT,$0-8
|
||||
// get Instruction Set Attributes 1 into x0
|
||||
// mrs x0, ID_AA64ISAR1_EL1 = d5380620
|
||||
WORD $0xd5380620
|
||||
MOVD R0, ret+0(FP)
|
||||
RET
|
||||
|
||||
// func getpfr0() uint64
|
||||
TEXT ·getpfr0(SB),NOSPLIT,$0-8
|
||||
// get Processor Feature Register 0 into x0
|
||||
// mrs x0, ID_AA64PFR0_EL1 = d5380400
|
||||
WORD $0xd5380400
|
||||
MOVD R0, ret+0(FP)
|
||||
RET
|
||||
@ -0,0 +1,11 @@
|
||||
// Copyright 2019 The Go Authors. All rights reserved.
|
||||
// Use of this source code is governed by a BSD-style
|
||||
// license that can be found in the LICENSE file.
|
||||
|
||||
// +build !gccgo
|
||||
|
||||
package cpu
|
||||
|
||||
func getisar0() uint64
|
||||
func getisar1() uint64
|
||||
func getpfr0() uint64
|
||||
@ -0,0 +1,11 @@
|
||||
// Copyright 2019 The Go Authors. All rights reserved.
|
||||
// Use of this source code is governed by a BSD-style
|
||||
// license that can be found in the LICENSE file.
|
||||
|
||||
// +build gccgo
|
||||
|
||||
package cpu
|
||||
|
||||
func getisar0() uint64 { return 0 }
|
||||
func getisar1() uint64 { return 0 }
|
||||
func getpfr0() uint64 { return 0 }
|
||||
@ -0,0 +1,56 @@
|
||||
// Copyright 2019 The Go Authors. All rights reserved.
|
||||
// Use of this source code is governed by a BSD-style
|
||||
// license that can be found in the LICENSE file.
|
||||
|
||||
package cpu
|
||||
|
||||
import (
|
||||
"io/ioutil"
|
||||
)
|
||||
|
||||
const (
|
||||
_AT_HWCAP = 16
|
||||
_AT_HWCAP2 = 26
|
||||
|
||||
procAuxv = "/proc/self/auxv"
|
||||
|
||||
uintSize = int(32 << (^uint(0) >> 63))
|
||||
)
|
||||
|
||||
// For those platforms don't have a 'cpuid' equivalent we use HWCAP/HWCAP2
|
||||
// These are initialized in cpu_$GOARCH.go
|
||||
// and should not be changed after they are initialized.
|
||||
var hwCap uint
|
||||
var hwCap2 uint
|
||||
|
||||
func readHWCAP() error {
|
||||
buf, err := ioutil.ReadFile(procAuxv)
|
||||
if err != nil {
|
||||
// e.g. on android /proc/self/auxv is not accessible, so silently
|
||||
// ignore the error and leave Initialized = false. On some
|
||||
// architectures (e.g. arm64) doinit() implements a fallback
|
||||
// readout and will set Initialized = true again.
|
||||
return err
|
||||
}
|
||||
bo := hostByteOrder()
|
||||
for len(buf) >= 2*(uintSize/8) {
|
||||
var tag, val uint
|
||||
switch uintSize {
|
||||
case 32:
|
||||
tag = uint(bo.Uint32(buf[0:]))
|
||||
val = uint(bo.Uint32(buf[4:]))
|
||||
buf = buf[8:]
|
||||
case 64:
|
||||
tag = uint(bo.Uint64(buf[0:]))
|
||||
val = uint(bo.Uint64(buf[8:]))
|
||||
buf = buf[16:]
|
||||
}
|
||||
switch tag {
|
||||
case _AT_HWCAP:
|
||||
hwCap = val
|
||||
case _AT_HWCAP2:
|
||||
hwCap2 = val
|
||||
}
|
||||
}
|
||||
return nil
|
||||
}
|
||||
@ -1,4 +1,4 @@
|
||||
// Code generated by linux/mkall.go generatePtracePair(arm, arm64). DO NOT EDIT.
|
||||
// Code generated by linux/mkall.go generatePtracePair("arm", "arm64"). DO NOT EDIT.
|
||||
|
||||
// +build linux
|
||||
// +build arm arm64
|
||||
@ -0,0 +1,17 @@
|
||||
// Code generated by linux/mkall.go generatePtraceRegSet("arm64"). DO NOT EDIT.
|
||||
|
||||
package unix
|
||||
|
||||
import "unsafe"
|
||||
|
||||
// PtraceGetRegSetArm64 fetches the registers used by arm64 binaries.
|
||||
func PtraceGetRegSetArm64(pid, addr int, regsout *PtraceRegsArm64) error {
|
||||
iovec := Iovec{(*byte)(unsafe.Pointer(regsout)), uint64(unsafe.Sizeof(*regsout))}
|
||||
return ptrace(PTRACE_GETREGSET, pid, uintptr(addr), uintptr(unsafe.Pointer(&iovec)))
|
||||
}
|
||||
|
||||
// PtraceSetRegSetArm64 sets the registers used by arm64 binaries.
|
||||
func PtraceSetRegSetArm64(pid, addr int, regs *PtraceRegsArm64) error {
|
||||
iovec := Iovec{(*byte)(unsafe.Pointer(regs)), uint64(unsafe.Sizeof(*regs))}
|
||||
return ptrace(PTRACE_SETREGSET, pid, uintptr(addr), uintptr(unsafe.Pointer(&iovec)))
|
||||
}
|
||||
@ -1,4 +1,4 @@
|
||||
// Code generated by linux/mkall.go generatePtracePair(mips, mips64). DO NOT EDIT.
|
||||
// Code generated by linux/mkall.go generatePtracePair("mips", "mips64"). DO NOT EDIT.
|
||||
|
||||
// +build linux
|
||||
// +build mips mips64
|
||||
@ -1,4 +1,4 @@
|
||||
// Code generated by linux/mkall.go generatePtracePair(mipsle, mips64le). DO NOT EDIT.
|
||||
// Code generated by linux/mkall.go generatePtracePair("mipsle", "mips64le"). DO NOT EDIT.
|
||||
|
||||
// +build linux
|
||||
// +build mipsle mips64le
|
||||
@ -1,4 +1,4 @@
|
||||
// Code generated by linux/mkall.go generatePtracePair(386, amd64). DO NOT EDIT.
|
||||
// Code generated by linux/mkall.go generatePtracePair("386", "amd64"). DO NOT EDIT.
|
||||
|
||||
// +build linux
|
||||
// +build 386 amd64
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in new issue